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Intel Announces Exascale Computing Plans

By DE Editors

At the International Supercomputing Conference (ISC), Kirk Skaugen, Intel Corporation vice president and general manager of the Data Center Group, outlined the company’s vision to achieve ExaFLOP/s performance by the end of this decade. An ExaFLOP/s is quintillion computer operations per second, hundreds times more than today’s fastest supercomputers.

Reaching exascale levels of performance in the future will not only require the combined efforts of industry and governments, but also approaches being pioneered by the Intel Many Integrated Core (Intel MIC) Architecture, according to Skaugen.

“While Intel Xeon processors are the clear architecture of choice for the current TOP500 list of supercomputers, Intel is further expanding its focus on high-performance computing by enabling the industry for the next frontier with our Many Integrated Core architecture for petascale and future exascale workloads,” says Skaugen. “Intel is uniquely equipped with unparalleled manufacturing technologies, new architecture innovations and a familiar software programming environment that will bring us closer to this exciting exascale goal.”

With increased performance comes a significant increase in power consumption. For example, for one of today’s fastest supercomputers, China’s Tianhe-1A, to achieve exascale performance, it would require more than 1.6 GW of power " an amount large enough to supply electricity to 2 million homes " thus presenting an energy efficiency challenge. To address this challenge, Intel and European researchers have established three European labs with three main goals: to create a sustained partner presence in Europe; take advantage of the growing relevance of European high-performance computing (HPC) research; and exponentially grow capabilities in computational science, engineering and strategic computing. One of the technical goals of these labs is to create simulation applications that begin to address the energy efficiency challenges of moving to exascale performance.

The performance of the TOP500 #1 system is estimated to reach 100 PetaFLOP/s in 2015 and break the barrier of 1 ExaFLOP/s in 2018. By the end of the decade the fastest system on Earth is forecasted to be able to provide performance of more than 4 ExaFLOP/s.

The first Intel MIC product, codenamed "Knights Corner,” is planned for production on Intel’s 22-nanometer technology that featuring 3-D Tri-Gate transistors1. Intel is currently shipping Intel MIC software development platforms, codenamed “Knights Ferry,” to select development partners.

For more information, visit Intel.

Sources: Press materials received from the company and additional information gleaned from the company’s website.

About DE Editors

DE's editors contribute news and new product announcements to Desktop Engineering. Press releases can be sent to them via DE-Editors@deskeng.com.
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